STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, announced the successful production of the world’s first semiconductor wafer whose ...
DatacenterDynamics is the world's largest data center publication. We publish news, magazine features, and podcasts about the ...
Wafer inspection has become a critical part of the semiconductor manufacturing process. Inspections performed after wafer test can analyze the marks left by probe cards to ensure that the test process ...
Although it requires a new generation of test equipment, testing MEMS devices is challenging but not impossible. Since the early days of the IC industry, wafer-level test has been possible using ...
FREMONT, CA / ACCESSWIRE / December 14, 2023 / Aehr Test Systems (NASDAQ:AEHR), a worldwide supplier of semiconductor test and burn-in equipment, today announced it has received an initial customer ...
Semiconductor testing firm Ardentec is optimistic about its future operations, driven by sustained strong orders in ...
FREMONT, CA / ACCESS Newswire / August 26, 2025 / Aehr Test Systems (AEHR), a worldwide supplier of semiconductor test and burn-in equipment, today announced it has received a purchase order from a ...
FREMONT, CA / ACCESS Newswire / November 3, 2025 / Aehr Test Systems (AEHR), a worldwide supplier of semiconductor test and burn-in solutions, today announced a strategic partnership with ISE Labs, ...
High testing parallelism can be achieved with contactless wafer testing, which leads to reduced production cycle times. It also eliminates the possibility of wafer damage during testing. According to ...
Raman spectroscopy uses inelastic scattering of protons from molecules that are covalently bound in order to identify functional groups, stresses, strains and crystallinity. It is a tool that is ...
The use of on-wafer superconducting materials, other novel materials, and traditional semiconductors at cryogenic temperatures (below about 123K, or -150°C) has grown quickly in recent years.
In a heterogeneous integrated system, the impact of composite yield fallout due to a single chiplet is creating new performance imperatives for wafer test in terms of test complexity and coverage.
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